South Korean storage manufacturer SK Hynix announced that its hybrid bonding packaging technology for high bandwidth memory (HBM) modules has achieved improved yield. Hybrid bonding technology allows storage chip manufacturers to achieve bonding connections between storage wafer layers without the need for micro bumps.

At present, the 12 layer HBM using mixed bonding has been validated and is promoting further optimization of mass production yield. This technology enables direct copper to copper bonding without the need for bumps, effectively reducing heat generation, improving bandwidth, and significantly reducing stack height, thereby achieving higher transmission rates and better energy efficiency performance.

To further improve transmission speed, performance, and single chip capacity, next-generation memory modules such as HBM4 and HBM5 need to stack more wafer layers; Meanwhile, due to the limited space requirements of the equipment, the overall size of the package must be strictly controlled. In this context, hybrid bonding technology removes the micro bump structure between bare chips, allowing manufacturers to achieve high-density stacking of more wafer layers within the same packaging volume.

The industry predicts that hybrid bonding will be applied starting from HBM4 and is expected to gradually achieve commercial use from the second half of this year or next year. However, current hybrid bonding still faces economic challenges.

To facilitate the transition of technology, SK Hynix is optimizing the MR-MUF process and has achieved a height standard of 16 layers for HBM3E. HBM packaging technology has evolved from TC-NCF to MR-MUF to hybrid bonding, achieving smaller warpage and higher production efficiency in each generation.

Recently, SK Hynix was awarded the 2026 IEEE Prize for its leading position in AI technology innovation through HBM.

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